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AM1808 Datasheet, PDF (17/264 Pages) Texas Instruments – AM1808 ARM Microprocessor
www.ti.com
AM1808
SPRS653 – FEBRUARY 2010
11
J
VSS
12
CVDD
13
14
15
DVDD18
DVDD3318_B
TCK
16
EMU0
17
RSVDN
18
TDO
19
RTC_XI
J
H
CVDD
CVDD
CVDD
RVDD
VSS
SPI1_ENA/
GP2[12]
SPI1_SOMI/
GP2[11]
RTC_VSS
RTC_XO
H
G
DVDD18
DVDD18
CVDD
DVDD3318_A
DVDD3318_A
SPI1_SCS[7]/
I2C0_SCL/
TM64P2_OUT12/
GP1[15]
SPI1_SIMO/
GP2[10]
SPI1_SCS[6]/
I2C0_SDA/
TM64P3_OUT12/
GP1[4]
SPI1_CLK/
GP2[13]
G
F
DVDD3318_B
DVDD3318_B
DVDD3318_B
DVDD18
DVDD3318_A
SPI1_SCS[4]/
UART2_TXD/
I2C1_SDA/
GP1[2]
SPI1_SCS[5]/
UART2_RXD/
I2C1_SCL/
GP1[3]
SPI1_SCS[1]/
EPWM1A/
PRU0_R30[7]/
GP2[15]/
TM64P2_IN12
SPI1_SCS[2]/
UART1_TXD/
SATA_CP_POD/
F
GP1[0]
EMA_A[18]/
EMA_A[16]/
E MMCSD0_DAT[3]/ MMCSD0_DAT[5]/
PRU1_R30[26]/
PRU1_R30[24]/
GP4[2]/
GP4[0]
PRU1_R31[18]
EMA_A[6]/
GP5[6]
DVDD3318_B
EMA_A[13]/
EMA_A[9]/
EMA_A[12]/
D
PRU0_R30[21]/
PRU1_R30[17]/
PRU1_R30[20]/
PRU1_R30[21]
GP5[9]
GP5[12]
GP5[13]
EMA_A[3]/
GP5[3]
CVDD
SPI0_SCS[1]/
TM64P0_OUT12/
GP1[7]/
MDIO_CLK/
TM64P0_IN12
SPI0_SCS[3]/
UART0_CTS/
GP8[2]/
MII_RXD[1]/
SATA_MP_SWITCH
SPI1_SCS[3]/
UART1_RXD/
SATA_LED/
GP1[1]
SPI1_SCS[0]/
EPWM1B/
PRU0_R30[8]/
E
GP2[14]/
TM64P3_IN12
EMA_A[1]/
GP5[1]
SPI0_SCS[2]/
UART0_RTS/
GP8[1]/
MII_RXD[0]/
SATA_CP_DET
SPI0_SCS[0]/
TM64P1_OUT12/
GP1[6]/
MDIO_D/
TM64P1_IN12
SPI0_SCS[4]/
UART0_TXD/
GP8[3]/
MII_RXD[2]
SPI0_CLK/
EPWM0A/
GP1[8]/
D
MII_RXCLK/
EMA_A[15]/
C MMCSD0_DAT[6]/
EMA_A[10]/
PRU1_R30[23]/
PRU1_R30[18]/
GP5[15]
GP5[10]
EMA_A[5]/
GP5[5]
EMA_A[0]/
GP5[0]
EMA_BA[0]/
GP2[8]
SPI0_SOMI/
EPWMSYNCI/
GP8[6]/
MII_RXER
SPI0_ENA/
EPWM0B/
PRU0_R30[6]/
MII_RXDV
SPI0_SIMO/
EPWMSYNCO/
GP8[5]/
MII_CRS
SPI0_SCS[5]/
UART0_RXD/
GP8[4]/
C
MII_RXD[3]
B
EMA_A[17]/
MMCSD0_DAT[4]/
PRU1_R30[25]
GP4[1]
EMA_A[11]/
PRU1_R30[19]/
GP5[11]
EMA_A7/
PRU1_R30[15]/
GP5[7]
EMA_A[2]/
GP5[2]
EMA_OE/
GP3[10]
EMA_CS[5]/
GP3[12]
EMA_CS[2]/
GP3[15]
EMA_WAIT[0]/
PRU0_R30[0]/
GP3[8]/
PRU0_R31[0]
EMA_WAIT[1]/
PRU0_R30[1]/
B
GP2[1]/
PRU0_R31[1]
A
EMA_A[20]/
MMCSD0_DAT[1]/
PRU1_R30[28]/
GP4[4]/
EMA_A[14]/
MMCSD0_DAT[7]/
PRU1_R30[22]/
GP5[14]
EMA_A[8]/
PRU1_R30[16]/
GP5[8]
PRU1_R31[20]
EMA_A[4]/
GP5[4]
EMA_BA[1]/
GP2[9]
EMA_RAS/
PRU0_R30[3]/
GP2[5]/
PRU0_R31[3]
11
12
13
14
15
16
Figure 3-3. Pin Map (Quad C)
EMA_CS[3]/
GP3[14]
17
EMA_CS[0]/
GP2[0]
18
VSS
A
19
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