AM1808 Datasheet, PDF (129/264 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
www.ti.com
SPRS653 – FEBRUARY 2010
Table 6-44. SATA PCB Stackup Specifications (continued)
PARAMETER
Number of layers between SATA routing region and reference ground plane
PCB Routing Feature Size
PCB Trace Width w
PCB BGA escape via pad size
PCB BGA escape via hole size
Device BGA pad size ⁽¹⁾
MIN TYP
4
4
18
8
(1) Please refer to the Flip Chip Ball Grid Array Package Reference Guide (SPRU811) for device BGA pad size.
MAX
0
UNIT
Mils
Mils
Mils
Mils
6.14.2.4 Routing Specifications
The SATA data signal traces are edge-coupled and must be routed to achieve exactly 100 Ohms
differential impedance. This is impacted by trace width, trace spacing, distance between planes, and
dielectric material. Verify with a proper PCB manufacturing tool that the trace geometry for both data
signal pairs results in exactly 100 ohms differential impedance traces. Table 6-45 shows the routing
specifications for the data and REFCLK signals .
Table 6-45. SATA Routing Specifications
PARAMETER
Device to SATA header trace length
REFCLK trace length from oscillator to Device
Number of stubs allowed on SATA traces
TX/RX pair differential impedance
Number of vias on each SATA trace
SATA differential pair to any other trace spacing
(1) Vias must be used in pairs with their distance minimized.
(2) DS is the differential spacing of the SATA traces.
MIN
2*DS
(2)
TYP
100
MAX
7000
2000
0
3
UNIT
Mils
Mils
Stubs
Ohms
Vias ⁽¹⁾
6.14.2.5 Coupling Capacitors
AC coupling capacitors are required on the receive data pair as well as the REFCLK pair. Table 6-46
shows the requirements for these capacitors.
Table 6-46. SATA Bypass and Coupling Capacitors Requirements
PARAMETER
SATA AC coupling capacitor value
SATA AC coupling capacitor package size
MIN TYP MAX UNIT
0.3 10 12
µF
0603
10 Mils ⁽¹⁾
(2)
(1) LxW, 10 mil units, i.e., a 0402 is a 40x20 mil surface mount capacitor.
(2) The physical size of the capacitor should be as small as possible.
6.14.2.6 SATA Interface Clock Source requirements
A high-quality, low-jitter differential clock source is required for the SATA PHY. The SATA interface
requires a LVDS differential clock source to be provided at signals SATA_REFCLKP and
SATA_REFCLKN. The clock source should be placed physically as close to the processor as possible.
Table 6-47 shows the requirements for the clock source.
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 129
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