TMS320DM6437 Datasheet, PDF (195/309 Pages) Texas Instruments – Digital Media Processor

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TMS320DM6437
Digital Media Processor
SPRS345B – NOVEMBER 2006 – REVISED MARCH 2007
Power Supplies Stable
MXI
CLKOUT0
POR
1
RESET
RESETOUT
SYSCLKREFCLK
(PLLC1)
SYSCLK1
PLL1 Clock
Div1 Clock
2
3
SYSCLK2
Div3 Clock
SYSCLK3
Boot and
Configuration Pins
Z+/Low Group
(Z longer-to-low)
Z+/High Group
(Z longer-to-high)
Z+/Invalid Group
(Z longer-to-invalid)
Div6 Clock
6
Driven or Hi-Z
5
4
Config
8
Driven or Hi-Z
8
8
9
Invalid
Z Group
Driven or Hi-Z
6
Z/Low Group
(Z-to-low)
Driven or Hi-Z
7
6
Z/High Group
(Z-to-high)
Driven or Hi-Z
7
6
DDR2 Z Group
6
DDR2 Low Group
6
DDR2 High Group
A. Pin reset behavior depends on which peripheral defaults to controlling the multiplexed pin. For more details on what
pin group (e.g., Z Group, Z/Low Group, Z/High Group, etc.) each pin belongs to, see Section 6.5.8, Pin Behaviors at
Reset.
Figure 6-8. Warm Reset (RESET) Timing^(A)
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Peripheral Information and Electrical Specifications 195