TLC2543-Q1 Datasheet, PDF (18/24 Pages) Texas Instruments – 12-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS

TLC2543ĆQ1
ą
12ĆBIT ANALOGĆTOĆDIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SGLS218B − NOVEMBER 2003 − REVISED NOVEMBER 2004
PRINCIPLES OF OPERATION
analog input, test, and power-down mode
The 11 analog inputs, three internal voltages, and power-down mode are selected by the input multiplexer
according to the input addresses shown in Table 3, Table 4, and Table 5. The input multiplexer is a
break-before-make type to reduce input-to-input noise rejection resulting from channel switching. Sampling of
the analog input starts on the falling edge of the fourth I/O CLOCK and continues for the remaining I/O CLOCK
pulses. The sample is held on the falling edge of the last I/O CLOCK pulse. The three internal test inputs are
applied to the multiplexer, then sampled and converted in the same manner as the external analog inputs. The
first conversion after the device has returned from the power-down state may not read accurately due to internal
device settling.
Table 3. Analog-Channel-Select Address
ANALOG INPUT
SELECTED
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
VALUE SHIFTED INTO
DATA INPUT
BINARY
HEX
0000
0
0001
1
0010
2
0011
3
0100
4
0101
5
0110
6
0111
7
1000
8
1001
9
1010
A
Table 4. Test-Mode-Select Address
INTERNAL
SELF-TEST
VOLTAGE
SELECTED†
Vref ₊ − Vref _−
2
VALUE SHIFTED INTO
DATA INPUT
BINARY
HEX
1011
B
UNIPOLAR OUTPUT
RESULT (HEX)‡
800
Vref _−
1100
C
000
Vref ₊
1101
D
FFF
† _{Vref + is the voltage applied to REF +, and Vref − is the voltage applied to REF −.}
‡ _{The output results shown are the ideal values and may vary with the reference stability}
and with internal offsets.
Table 5. Power-Down-Select Address
INPUT COMMAND
Power down
VALUE SHIFTED INTO
DATA INPUT
BINARY
HEX
1110
E
RESULT
ICC ≤ 25 µA
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