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TLC2543-Q1 Datasheet, PDF (10/24 Pages) Texas Instruments – 12-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS | |||
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TLC2543ÄQ1
Ä
12ÄBIT ANALOGÄTOÄDIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SGLS218B â NOVEMBER 2003 â REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
CS
(see Note A)
I/O CLOCK
1
2
3
4
Access Cycle B
5
6
7
Sample Cycle B
8 ÃÃÃÃÃÃÃÃÃÃÃÃ 1
DATA OUT
A7
A6
A5
A4
A3
A2
A1
A0
Hi-Z
B7
Previous Conversion Data
MSB
LSB
DATAINPUT ÃÃÃÃÃÃB7ÃÃÃÃB6 ÃÃÃÃB5 ÃÃ B4 ÃÃB3 ÃÃBÃÃ2 ÃÃBÃÃ1 ÃÃBÃÃ0 ÃÃÃÃÃÃÃÃ ÃÃÃÃÃÃC7ÃÃÃÃ
MSB
LSB
EOC
Initialize
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous
Conversion Value
t(conv)
A/D Conversion
Interval
Initialize
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CSâ before responding to control input signals.
Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 11. Timing for 8-Clock Transfer Using CS With MSB First
CS
(see Note A)
I/O CLOCK
1
2
3
4
5
6
7
8
1
Access Cycle B
Sample Cycle B
DATA OUT
A7
A6
A5
A4
A3
A2
A1
A0
Previous Conversion Data
ÃÃÃÃÃÃÃÃÃÃÃÃ ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ DATAINPUT
MSB
LSB
B7
B6
B5
B4
B3
B2
B1
B0
MSB
LSB
Low Level
B7
ÃÃÃÃCÃÃ7 ÃÃ
EOC
Initialize
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous
Conversion Value
t(conv)
A/D Conversion
Interval
Initialize
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CSâ before responding to control input signals.
Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 12. Timing for 8-Clock Transfer Not Using CS With MSB First
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