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TLC2543-Q1 Datasheet, PDF (11/24 Pages) Texas Instruments – 12-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS | |||
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TLC2543ÄQ1
12ÄBIT ANALOGÄTOÄDIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SGLS218B â NOVEMBER 2003 â REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
CS
(see Note A)
I/O
CLOCK
1
2
3
4
Access Cycle B
5
6
7
8
15
16
1
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Sample Cycle B
DATA
OUT
A15
A14 A13
A12 A11
A10 A9
A8
A1
A0
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ DATA
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ INPUT
MSB
Previous Conversion Data
LSB
B7
B6
B5
B4
B3
B2
B1
B0
MSB
LSB
Hi-Z State
B15
ÃÃÃÃÃ
C7
EOC
Initialize
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous
Conversion Value
t(conv)
A/D Conversion
Interval
Initialize
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CSâ before responding to control input signals.
Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 13. Timing for 16-Clock Transfer Using CS With MSB First
CS
(see Note A)
I/O
CLOCK
1
2
3
4
Access Cycle B
5
6
7
8
15
16
Sample Cycle B
DATA
OUT
A15
A14 A13 A12 A11 A10 A9
A8
A1
A0
ÃÃ ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ DATA
ÃÃ ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ INPUT
MSB
Previous Conversion Data
LSB
B7
B6
B5
B4
B3
B2
B1
B0
MSB
LSB
1
Low Level
B15
ÃÃÃÃÃÃÃÃÃÃ
C7
EOC
Initialize
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous
Conversion Value
t(conv)
A/D Conversion
Interval
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CSâ before responding to control input signals.
Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 14. Timing for 16-Clock Transfer Not Using CS With MSB First
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