XIO2200A_12 Datasheet, PDF (16/203 Pages) Texas Instruments – PCI Express to PCI Bus Translation Bridge with 1394a OHCI and Two-Port PHY

Not Recommended for New Designs
Introduction
2.2 Related Documents
• PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0
• PCI Express Base Specification, Revision 1.0a
• PCI Express Card Electromechanical Specification, Revision 1.0a
• PCI Local Bus Specification, Revision 2.3
• PCI-to-PCI Bridge Architecture Specification, Revision 1.2
• PCI Bus Power Management Interface Specification, Revision 1.1 or 1.2
• 1394 Open Host Controller Interface Specification (Release 1.1)
• IEEE Standard for a High Performance Serial Bus (IEEE Std 1394-1995)
• IEEE Standard for a High Performance Serial Bus—Amendment 1 (IEEE Std 1394a-2000)
• Express Card Standard, Release 1.0
• PCI Express Jitter and BER White Paper
2.3 Trademarks
• PCI Express is a trademark of PCI-SIG
• TI, OHCI-Lynx, and MicroStar BGA are trademarks of Texas Instruments Incorporated
• Other trademarks are the property of their respective owners
2.4 Document Conventions
Throughout this data manual, several conventions are used to convey information. These conventions are
listed below:
1. To identify a binary number or field, a lower case b follows the numbers. For example: 000b is a 3-bit binary
field.
2. To identify a hexadecimal number or field, a lower case h follows the numbers. For example: 8AFh is a
12-bit hexadecimal field.
3. All other numbers that appear in this document that do not have either a b or h following the number are
assumed to be decimal format.
4. If the signal or terminal name has a bar above the name (for example, GRST), then this indicates the
logical NOT function. When asserted, this signal is a logic low, 0, or 0b.
5. Differential signal names end with P, N, +, or − designators. The P or + designators signify the positive
signal associated with the differential pair. The N or − designators signify the negative signal associated
with the differential pair.
6. RSVD indicates that the referenced item is reserved.
7. The power and ground signals in Figure 2−1 are not subscripted to aid in readability.
8. In Sections 4 through 6, the configuration space for the bridge is defined. For each register bit, the software
access method is identified in an access column. The legend for this access column includes the following
entries:
r – read access by software
u – updates by the bridge internal hardware
w – write access by software
c – clear an asserted bit with a write-back of 1b by software
9. The XIO2200A consists of a PCI-Express to PCI translation bridge where the secondary PCI bus is
internally connected to a 1394a OHCI with a 2-port PHY. When describing functionality that is specific to
the PCI-Express to PCI translation bridge, the term bridge is used to reduce text. The term 1394a OHCI
is used to reduce text when describing the 1394a OHCI with 2-port PHY function.
March 5 2007 − June 2011
SCPS154C
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