THS8133 Datasheet, PDF (16/23 Pages) Texas Instruments – TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION

THS8133, THS8133A, THS8133B
TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRI-LEVEL SYNC GENERATION
SLVS204C – APRIL 1999 – REVISED SEPTEMBER 2000
APPLICATION INFORMATION
SMPTE 253M (continued)
BLANK can be tied high in this mode if the data input is kept to 000h during the blanking time, since black and
blanking level are at identical levels. Furthermore the SYNC_T terminal remains low, since only a bi-level sync
is generated.
SMPTE 274M
This standard defines a raster scanning format of 1920×1080 pixels inside a total raster of 1125 lines and an
aspect ratio of 16:9, GBR and YPbPr color encoding formats and both analog and digital interfaces for GBR
and YPbPr formats.
With respect to the analog interface, SMPTE 274M defines the position of the start of each line at the positive
zero-crossing of a tri-level sync pulse. The sync pulse has a negative-going transition on a fixed number of clock
cycles preceding this instant and another negative transition on a fixed number of clock cycles following this
instant, as shown in Figure 13. The positive peak of sync is 300 mV; the negative peak of sync –300 mV.
The interface can carry both GBR or YPbPr signals. The tri-level horizontal sync is inserted on all analog outputs
and has identical absolute amplitude levels in all cases. For Y, black corresponds to a level of 0 V and peak white
is 700 mV. Pb and Pr on the other hand have amplitudes between –350 mV and 350 mV.
The relative amplitudes of the current sources are identical to the case of SMPTE 253M. However, in this case
a tri-level sync needs to be generated instead of a bi-level negative sync, and it needs to be present on all three
component outputs. THS8133 supports the tri-level sync via an additional internal current source, activated by
asserting SYNC_T. The sync insertion on all outputs is under the control of the INS3_INT pin. When asserted
(high), the sync is inserted on all three output channels.
0H
44T
44T
Analog
Waveform
(Y’R’G’B’)
Duration in
Reference
Clock Period
1920T
Figure 13. SMPTE 274M Line Waveform^†
† _{This figure is for illustration purposes only. Consult the latest SMPTE 274M standard when designing a compliant system.}
Figure 14 shows the relative amplitudes of video and horizontal/vertical sync. The level of vertical sync (broad
pulse) is identical to the negative excursion of horizontal sync and therefore can be generated by the same
current source on THS8133 by appropriately asserting the sync control inputs.
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