DRV3204-Q1_15 Datasheet, PDF (16/38 Pages) Texas Instruments – Three-Phase Brushless Motor Driver

DRV3204-Q1
SLVSBT3B – MARCH 2013 – REVISED JULY 2013
Bit Name
Type Reset
Description
Bit 0 = CMRST - clock monitor
0: Read = Reset has not occurred.
Write = No effect
1: Read = A corresponding reset source caused the last reset condition.
Write = No effect
Read access to this register clears the bits.
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SPARE (address 0x0D): Spare Register
Bit Name
Type⁽¹⁾ Reset Description
7:2 SPARE
RW
0000 Spare registers for future use. Read and write have no effect.
00
1:0 SEL_COMP_HY RW
00
Select phase comparator hysteresis voltage. The following show the typical values.
S
MM 00: 0 V
MM 01: 25 mV
MM 10: 50 mV
MM 11: 100 mV
(1) R: Read W: Write
CHARGE PUMP
Description:
The charge-pump block generates a supply for the high-side and low-side pre-drivers to maintain the gate
voltage on the external FETs. Use of an external storage capacitor (CCP) and bucket capacitors (C1, C2)
supports pre-driver slope and switching-frequency requirements. R1 and R2 can reduce switching current if
required. The charge pump has voltage-supervisor functions such as over- and undervoltage, and selectable
stop conditions for pre-drivers.
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