SLK2701 Datasheet, PDF (15/21 Pages) Texas Instruments – OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER

PLL performance specifications
PARAMETER
PLL startup lock time
Acquisition lock time
SLK2701
OCĆ48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER
SLLS518 − DECEMBER 2001
TEST CONDITIONS
VDD, VDDC = 2.3 V, after REFCLK is stable
Valid SONET signal or PRBS OC-48
MIN TYP MAX UNIT
1 ms
2031
Bit
Times
serial transmitter/receiver characteristics
PARAMETER
Vodd = |STXDOP−STXDON|, transmit
differential output voltage under
preemphasis
V(CMT)
V(CMR)
Il
Rl
CI
td(TX_Latency)
td(RX_Latency)
Transmit common mode voltage range
Receiver Input voltage requirement,
Vid = |SRXDIP−SRXDIN|
Receiver common mode voltage range
Receiver input leakage
Receiver differential impedance
Receiver input capacitance
TEST CONDITIONS
PRE1 = 0,
PRE2 = 0, Rt = 50,
See Table 4 and Figure 1
PRE1 = 1,
PRE2 = 0
PRE1 = 0,
PRE2 = 1
PRE1 = 1,
PRE2 = 1
Rt = 50 Ω
MIN NOM MAX UNIT
650 850 1000 mV
550 750 900
540 700 860 mV
500 650 800
1100 1250 1400 mV
150
mV
1100
−550
80
1250
100
2250
550
120
1
50
50
mV
µA
Ω
pF
Bit
Times
serial differential switching characteristics over recommended operating conditions (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
tt
Differential signal rise time (20% to 80%) RL = 50 Ω,
80 100 140 ps
tj
Output jitter
Jitter-free data, 12 kHz to 20 MHz, RLOOP = 1
0.05 0.1 UI(pp)
Jitter tolerance
RLOOP = 1
See Figure 3
Jitter transfer
RLOOP = 1
See Figure 2
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