TMS320C82 Datasheet, PDF (130/147 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

TMS320C82
DIGITAL SIGNAL PROCESSOR
SPRS048 — APRIL 1998
local bus switching characteristics - CLKOUT
CLKOUT may switch at either the CLKIN rate (PLL mode) or ½ the CLKIN rate (non-PLL mode). In either
mode, no skew or phase relationship is guaranteed (function of PLL is to allow for higher processor rates
with lower frequency oscillator). Each state of a memory access begins on the falling edge of CLKOUT.
NO.
PARAMETER
C82-50
MIN
MAX
6
tc(CKO)
Period of CLKOUT (non-PLL mode)
2tc(CKI)†
6
tc(CKO)
Period of CLKOUT (PLL mode)
tc(CKI)†
7
tw(CKOH) Pulse duration of CLKOUT high
tH-4.5
8
tw(CKOL) Pulse duration of CLKOUT low
tH-4.5
9
tt(CKO)
Transition time of CLKOUT
2‡
10 tJITTER
CLKOUT jitter (PLL mode only)
1.2§
† This is a functional minimum and is not tested. This parameter may also be specified as 2t_H.
‡ This parameter is specified by computer simulation and is not tested.
§ This parameter is characterized and is not tested.
C82-60
MIN
MAX
2tc(CKI)†
tc(CKI)†
tH-3.7
tH-3.7
2‡
0.8§
UNIT
ns
ns
ns
ns
ns
ns
CLKO UT
6
7
9
10
9
10
8
10
10
Figure 108. CLKOUT Timing
130
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