SM320C6713-EP_1 Datasheet, PDF (109/131 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSORS

SM320C6713-EP
SM320C6713B-EP
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11.13 Multichannel Audio Serial Port (McASP) Timing
SGUS049I – AUGUST 2003 – REVISED SEPTEMBER 2009
Table 11-19. Timing Requirements for McASP
See Figure 11-27 and Figure 11-28
NO.
1
t_c(AHCKRX)
2
t_w(AHCKRX)
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
3
t_c(ACKRX)
Cycle time, ACLKR/X
ACLKR/X ext
4
t_w(ACKRX)
Pulse duration, ACLKR/X high or low
5
t_{su(AFRXC-ACKRX)}
Setup time, AFSR/X input valid before
ACLKR/X latches data
ACLKR/X ext
ACLKR/X int
ACLKR/X ext
6
t_{h(ACKRX-AFRX)}
Hold time, AFSR/X input valid after
ACLKR/X latches data
ACLKR/X int
ACLKR/X ext
7
t_{su(AXR-ACKRX)}
Setup time, AXR input valid before ACLKR/X ^{ACLKR/X int}
latches data
ACLKR/X ext
8
t_h(ACKRX-AXR)
Hold time, AXR input valid after ACLKR/X
latches data
ACLKR/X int
ACLKR/X ext
(1) P = SYSCLK2 period
6713
MIN MAX
20
7.5
Greater of
2P⁽¹⁾ or 33
14
6
3
0
3
10.2
6
1
3
6713B
MIN MAX
20
7.5
33
14
6
3
0
3
8
3
1
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 11-20. Switching Characteristics for McASP⁽¹⁾
over recommended operating conditions (see Figure 11-27 and Figure 11-28)
NO.
9
10
11
t_c(AHCKRX)
t_w(AHCKRX)
t_c(ACKRX)
PARAMETER
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
Cycle time, ACLKR/X
ACLKR/X int
12
t_w(ACKRX)
Pulse duration, ACLKR/X high or low
13
t_{d(ACKRX-AFRX)}
Delay time, ACLKR/X transmit edge to AFSX/R
output valid
ACLKR/X int
ACLKR/X int
ACLKR/X ext
14
t_d(ACKX-AXRV)
ACLKR/X int
Delay time, ACLKX transmit edge to AXR output valid
ACLKR/X ext
15
t_{dis(ACKRX−AXRHZ)}
Disable time, AXR high impedance following last data
bit from ACLKR/X transmit edge
ACLKR/X int
ACLKR/X ext
(1) AH = AHCLKR/X period in ns; A = ACLKR/X period in ns
(2) P = SYSCLK2 period
MIN
20
(AH/2) – 2.5
Greater of
2P⁽²⁾ or 33
(AH/2) – 2.5
–1
0
–1
0
–1
–1
MAX
UNIT
ns
ns
ns
ns
5 ns
10 ns
5 ns
10 ns
10 ns
10 ns
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PARAMETRIC INFORMATION 109