AM1808_1004 Datasheet, PDF (103/264 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
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SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-22. Switching Characteristics for EMIFA Asynchronous Memory Interface ^{(1) (2) (3)} (continued)
NO
.
PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
MIN
Nom
MAX
UNIT
10 t_w(EMOEL)
EMA_OE active low width (EW = 0)
EMA_OE active low width (EW = 1)
(RST)*E-3
(RST)*E
(RST)*E+3 ns
(RST+(EWC*16))
*E-3
(RST+(EWC*16))*E
(RST+(EWC*16))
*E+3
ns
11 ^td(EMWAITH-
EMOEH)
Delay time from EMA_WAIT deasserted to
EMA_OE high
WRITES
3E-3
4E
4E+3 ns
15 t_c(EMWCYCLE)
EMIF write cycle time (EW = 0)
EMIF write cycle time (EW = 1)
(WS+WST+WH)*
E-3
(WS+WST+WH)*E
(WS+WST+WH)*
E+3
ns
(WS+WST+WH+( (WS+WST+WH+(E (WS+WST+WH+(
EWC*16))*E - 3
WC*16))*E EWC*16))*E + 3
ns
Output setup time, EMA_CE[5:2] low to
EMA_WE low (SS = 0)
16 t_{su(EMCEL-EMWEL) Output setup time, EMA_CE[5:2] low to}
EMA_WE low (SS = 1)
(WS)*E - 3
-3
(WS)*E
0
(WS)*E + 3 ns
+3 ns
Output hold time, EMA_WE high to
EMA_CE[5:2] high (SS = 0)
17 t_{h(EMWEH-EMCEH) Output hold time, EMA_WE high to}
EMA_CE[5:2] high (SS = 1)
(WH)*E-3
-3
(WH)*E
0
(WH)*E+3 ns
+3 ns
18 ^tsu(EMDQMV-
EMWEL)
Output setup time, EMA_BA[1:0] valid to
EMA_WE low
19 ^th(EMWEH-
EMDQMIV)
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
20
t_{su(EMBAV-EMWEL)}
Output setup time, EMA_BA[1:0] valid to
EMA_WE low
(WS)*E-3
(WH)*E-3
(WS)*E-3
(WS)*E
(WH)*E
(WS)*E
(WS)*E+3 ns
(WH)*E+3 ns
(WS)*E+3 ns
21
t_{h(EMWEH-EMBAIV)}
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
(WH)*E-3
(WH)*E
(WH)*E+3 ns
22 t_{su(EMAV-EMWEL)}
Output setup time, EMA_A[13:0] valid to
EMA_WE low
(WS)*E-3
(WS)*E
(WS)*E+3 ns
23 t_{h(EMWEH-EMAIV)}
Output hold time, EMA_WE high to
EMA_A[13:0] invalid
(WH)*E-3
(WH)*E
(WH)*E+3 ns
24 t_w(EMWEL)
EMA_WE active low width (EW = 0)
EMA_WE active low width (EW = 1)
(WST)*E-3
(WST)*E
(WST)*E+3 ns
(WST+(EWC*16))
*E-3
(WST+(EWC*16))*E
(WST+(EWC*16))
*E+3
ns
25 ^td(EMWAITH-
EMWEH)
26 t_{su(EMDV-EMWEL)}
Delay time from EMA_WAIT deasserted to
EMA_WE high
Output setup time, EMA_D[15:0] valid to
EMA_WE low
3E-3
(WS)*E-3
4E
(WS)*E
4E+3 ns
(WS)*E+3 ns
27 t_{h(EMWEH-EMDIV)}
Output hold time, EMA_WE high to
EMA_D[15:0] invalid
(WH)*E-3
(WH)*E
(WH)*E+3 ns
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Peripheral Information and Electrical Specifications 103
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