BQ4832Y Datasheet, PDF (1/18 Pages) Texas Instruments – RTC Module With 32Kx8 NVSRAM

bq4832Y
RTC Module With 32Kx8 NVSRAM
Features
® Integrated SRAM, real-time
clock, CPU supervisor, crystal,
power-fail circuit, and battery
® Real-Time Clock counts hun-
dredths of seconds through years
in BCD format
® RAM-like clock access
® Compatible with industry-
standard 32K x 8 SRAMs
® Unlimited write cycles
® 10-year minimum data retention
and clock operation in the ab-
sence of power
® Automatic power-fail chip dese-
lect and write-protection
® Watchdog timer, power-on reset,
alarm/periodic interrupt, power-
fail and battery-low warning
® Software clock calibration for
greater than ± 1 minute per
month accuracy
General Description
The bq4832Y RTC Module is a non-
volatile 262,144-bit SRAM organ-
ized as 32,768 words by 8 bits with
an integral real-time clock and CPU
supervisor. The CPU supervisor pro-
vides a programmable watchdog
timer and a microprocessor reset.
Other features include alarm,
power-fail, and periodic interrupts,
and a battery-low warning.
The device combines an internal
lithium battery, quartz crystal, clock
and power-fail chip, and a full
CMOS SRAM in a plastic 32-pin
DIP module. The RTC Module di-
rectly replaces industry-standard
SRAMs and also fits into many
EPROM and EEPROM sockets
without any requirement for special
write timing or limitations on the
number of write cycles.
Registers for the real-time clock,
alarm and other special functions
are located in registers 7FF0h–
7FFFh of the memory array.
The clock and alarm registers are
dual-port read/write SRAM loca-
tions that are updated once per sec-
ond by a clock control circuit from
the internal clock counters. The
dual-port registers allow clock up-
dates to occur without interrupting
normal access to the rest of the
SRAM array.
The bq4832Y also contains a power-
fail-detect circuit. The circuit dese-
lects the device whenever VCC falls
below tolerance, providing a high de-
gree of data security. The battery is
electrically isolated when shipped
from the factory to provide maxi-
mum battery capacity. The battery
remains disconnected until the first
application of VCC.
Pin Connections
RST 1
NC 2
A14 3
A12 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
32 VCC
31 NC
30 INT
29 WE
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
32-Pin DIP Module
PN483201.eps
Pin Names
A0–A14 Address input
CE
Chip enable
RST
Microprocessor reset
WE
Write enable
OE
Output enable
DQ0–DQ7 Data in/data out
INT
Programmable interrupt
VCC
+5 volts
VSS
Ground
Sept. 1996 C
1