THCV226_16 Datasheet, PDF (13/27 Pages) THine Electronics, Inc. – THCV226 is designed to support video data transmission between the host and display.

THCV226
Output
RLAz[0]
RLAz[1]
RLAz[2]
RLAz[3]
RLAz[4]
RLAz[5]
RLAz[6]
RLBz[0]
RLBz[1]
RLBz[2]
RLBz[3]
RLBz[4]
RLBz[5]
RLBz[6]
RLCz[0]
RLCz[1]
RLCz[2]
RLCz[3]
RLCz[4]
RLCz[5]
RLCz[6]
RLDz[0]
RLDz[1]
RLDz[2]
RLDz[3]
RLDz[4]
RLDz[5]
RLDz[6]
RLEz[0]
RLEz[1]
RLEz[2]
RLEz[3]
RLEz[4]
RLEz[5]
RLEz[6]
0 (8bit)
R[0]
R[1]
R[2]
R[3]
R[4]
R[5]
G[0]
G[1]
G[2]
G[3]
G[4]
G[5]
B[0]*2
B[1]*2
B[2]*2
B[3]*2
B[4]*2
B[5]*2
HSYNC
VSYNC
DE
R[6]
R[7]
G[6]
G[7]
B[6]*2
B[7]*2
N/A*1
Channel
Power
Down
COL
1 (10bit)
R[0]*2
R[1]*2
R[2]
R[3]
R[4]
R[5]
G[0]*2
G[1]*2
G[2]
G[3]
G[4]
G[5]
B[0]*2
B[1]*2
B[2]*2
B[3]*2
B[4]*2
B[5]*2
HSYNC
VSYNC
DE
R[6]
R[7]
G[6]
G[7]
B[6]*2
B[7]*2
CONT[1]*2*3
R[8]
R[9]
G[8]
G[9]
B[8]*2
B[9]*2
CONT[2]*2*3
Comment
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Control bit
Control bit
Data Enable*2
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Data bit
Table 9. LVDS Data Mapping Table for VESA Format (MAP=0)
*1 N/A : Not available. THCV226 outputs RLDz[6]=0
*2 CTL bits, which are carried during DE=0 expect the 1st and the last pixel.
*3 3D flags defined in the V-by-One^® HS Standard are assigned to the following bits.
V-by-One^® HS Standard Packer/Unpacker D[24](3DLR)  LVDS RLEz[6].
V-by-One^® HS Standard Packer/Unpacker D[25](3DEN)  LVDS RLDz[6].
( z=0,1,2,3)
THCV226_Rev.1.10_E
Copyright©2015 THine Electronics, Inc.
13/27
THine Electronics, Inc.
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