THCV226_16 Datasheet, PDF (1/27 Pages) THine Electronics, Inc. – THCV226 is designed to support video data transmission between the host and display.

THCV226
V-by-One® HS High-speed Video Data Receiver
General Description
THCV226 is designed to support video data
transmission between the host and display. This chip
can receive 32bit video data and 3bit control data via
four differential pairs of V-by-One^® HS lanes. This
chip in TQFP package supports the video data
transmission up to 1080p/10b/120Hz. The maximum
serial data rate is 3.4Gbps/lane.
Block Diagram
Features
 Normal / High-speed LVDS output selectable
 1.8V single power supply
 Color depth selectable: 8/10 bits per colors
 Crossing / Distribution mode selectable
 Monitoring signal function
 1.8V LVTTL I/O interface
 Package: 128pin 0.4mm-pitch TQFP
(16mm x 16mm)
 Wide frequency range
 AC coupling for CML inputs
 CDR requires no external frequency reference
 Supports Spread Spectrum Clocking tolerance
with up to 30kHz/0.5%(center spread)
 V-by-One^® HS standard compliant
 PLL requires no external components
 Power down / Output enable mode
VDD
(1.8V)
Rx0p
Rx0n
Rx1p
Rx1n
Rx2p
Rx2n
Rx3p
Rx3n
HTPDN
LOCKN
BETOUT
DGLOCK
Controls
RLA0p/n
RLE0p/n
RLCLK0p/n
RLA1p/n
RLE1p/n
RLCLK1p/n
RLA2p/n
RLE2p/n
RLCLK2p/n
RLA3p/n
RLE3p/n
RLCLK3p/n
 Data Transmission Rate of CML Input
Color
Depth
Normal Speed
LVDS Mode
High-Speed
LVDS Mode
8bit
1.2 to 2.7Gbps
1.2 to 2.36Gbps
10bit
1.6 to 3.4Gbps
1.6 to 3.14Gbps
 Clock Frequency of LVDS Output
Color
Depth
Normal Speed
LVDS Mode
High-Speed
LVDS Mode
8bit
40 to 90MHz
80 to 157MHz
10bit
40 to 85MHz
80 to 157MHz
Color Depth
Transmission Mode Setting
Power Down
Output Enable
Monitoring Signal Setting
THCV226_Rev.1.10_E
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