SM5964 Datasheet, PDF (4/28 Pages) SyncMOS Technologies,Inc – 8 - bit single chip microcontroller with 64KB flash & 1K byte RAM embedded

SyncMOS Technologies Inc.
July 2002
Pin Descriptions
40L 44L 44L
PDIP QFP PLCC Symbol
Pin# Pin# Pin#
1 40 2 T2/P1.0
2 41 3 T2EX/P1.1
3 42 4 P1.2
4 43 5 SPWM0/P1.3
5 44 6 SPWM1/P1.4
6 1 7 SPWM2/P1.5
7 2 8 SPWM3/P1.6
8 3 9 SPWM4/P1.7
9 4 10 RES
10 5 11 RXD/P3.0
11 7
13 TXD/P3.1
12 8 14 #INT0/P3.2
13 9 15 #INT1/P3.3
14 10 16 T0/P3.4
15 11 17 T1/P3.5
16 12 18 #WR/P3.6
17 13 19 #RD/P3.7
18 14 20 XTAL2
19 15 21 XTAL1
20 16 22 VSS
21 18 24 P2.0/A8
22 19 25 P2. 1/A9
23 20 26 P2.2/A10
24 21 27 P2.3/A11
25 22 28 P2.4/A12
26 23 29 P2.5/A13
27 24 30 P2.6/A14
28 25 31 P2.7/A15
29 26 32 #PSEN
30 27 33 ALE
31 29 35 #EA
32 30 36 P0.7/AD7
33 31 37 P0.6/AD6
34 32 38 P0.5/AD5
35 33 39 P0.4/AD4
36 34 40 P0.3/AD3
37 35 41 P0.2/AD2
38 36 42 P0.1/AD1
39 37 43 P0.0/AD0
40 38 44 VDD
17 23 P4.0
28 34 P4.1
39
1 P4.2
6 12 P4.3
Active I/O Names
i/o timer 2 clock out & bit 0 of port 1
i/o timer 2 control & bit 1 of port 1
i/o bit 2 of port 1
i/o SPWM Channel 0, bit 3 of port 1
i/o SPWM Channel 1, bit 4 of port 1
i/o SPWM Channel 2, bit 5 of port 1
i/o SPWM Channel 3, bit 6 of port 1
i/o SPWM Channel 4, bit 7 of port 1
H
i Reset
i/o Receive data & bit 0 of port 3
i/o Transmit data & bit 1 of port 3
L/ - i/o low true interrupt 0 & bit 2 of port 3
L/ - i/o low true interrupt 1 & bit 3 of port 3
i/o Timer 0 & bit 4 of port 3
i/o Timer 1 & bit 5 of port 3
L/ - i/o ext. memory write & bit 6 of port 3
L/ - i/o ext. memory read & bit 7 of port 3
o Crystal out
i Crystal in
Sink Voltage, Ground
i/o bit 0 of port 2 & bit 8 of external memory address
i/o bit 1 of port 2 & bit 9 of external memory address
i/o bit 2 of port 2 & bit 10 of external memory address
i/o bit 3 of port 2 & bit 11 of external memory address
i/o bit 4 of port 2 & bit 12 of external memory address
i/o bit 5 of port 2 & bit 13 of external memory address
i/o bit 6 of port 2 & bit 14 of external memory address
i/o bit 7 of port 2 & bit 15 of external memory address
L o program storage enable
-
o address latch enable
L
i external access
i/o bit 7 of port 0 & data/address bit 7 of external memory
i/o bit 6 of port 0 & data/address bit 6 of external memory
i/o bit 5 of port 0 & data/address bit 5 of external memory
i/o bit 4 of port 0 & data/address bit 4 of external memory
i/o bit 3 of port 0 & data/address bit 3 of external memory
i/o bit 2 of port 0 & data/address bit 2 of external memory
i/o bit 1 of port 0 & data/address bit 1 of external memory
i/o bit 0 of port 0 & data/address bit 0 of external memory
Drive Voltage
i/o bit 0 of Port 4
i/o bit 1 of Port 4
i/o bit 2 of Port 4
i/o bit 3 of Port 4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/28
Ver 1.0
SM5964
PID 5964 07/02