SM5964 Datasheet, PDF (18/28 Pages) SyncMOS Technologies,Inc – 8 - bit single chip microcontroller with 64KB flash & 1K byte RAM embedded

SyncMOS Technologies Inc.
July 2002
SM5964
AC Characteristics
(16/25/40 MHZ, operating conditions; CL for Port 0, ALE and PSEN Outputs=150uF; CL for all Other Output=80pF)
Symbol
Parameter
Valid
Cycle
f osc 16
Variable f osc
Unit
Min. Typ. Max Min. Typ. Max
T LHLL ALE pulse width
RD/WRT 115
2xT - 10
nS
T AVLL Address Valid to ALE low
RD/WRT 43
T - 20
nS
T LLAX Address Hold after ALE low
RD/WRT 53
T - 10
nS
T LLIV
ALE low to Valid Instruction In
RD
240
4xT - 10 nS
T LLPL ALE low to #PSEN low
RD
53
T - 10
nS
T PLPH #PSEN pulse width
RD
173
3xT - 15
nS
T PLIV
#PSEN low to Valid Instruction In
RD
177
3xT - 10 nS
T PXIX Instruction Hold after #PSEN
RD
0
0
nS
T PXIZ
Instruction Float after #PSEN
RD
87
T + 25 nS
T AVIV
Address to Valid Instruction In
RD
292
5xT - 20 nS
T PLAZ #PSEN low to Address Float
RD
10
10 nS
T RLRH #RD pulse width
RD
365
6xT - 10
nS
T WLWH #WR pulse width
WRT
365
6xT - 10
nS
T RLDV #RD low to Valid Data In
RD
302
5xT - 10 nS
T RHDX Data Hold after #RD
RD
0
0
nS
T RHDZ Data Float after #RD
RD
145
2xT + 20 nS
T LLDV ALE low to Valid Data In
RD
590
8xT - 10 nS
T AVDV Address to Valid Data In
RD
542
9xT - 20 nS
T LLYL
ALE low to #WR High or #RD low RD/WRT 178
197 3xT - 10
3xT + 10 nS
T AVYL Address Valid to #WR or #RD low RD/WRT 230
4xT - 20
nS
T QVWH Data Valid to #WR High
WRT
403
7xT - 35
nS
T QVWX Data Valid to #WR transition
WRT
38
T - 25
nS
T WHQX Data hold after #WR
WRT
73
T + 10
nS
T RLAZ #RD low to Address Float
RD
5 nS
T YALH #WR or #RD high to ALE high
RD/WRT 53
72 T -10
T + 10 nS
T CHCL clock fall time
nS
T CLCX clock low time
nS
T CLCH clock rise time
nS
T CHCX clock high time
nS
T, TCLCL clock period
63
1/fosc
nS
Remarks
Specifications subject to change without notice,contact your sales representatives for the most recent information.
18/28
Ver 1.0
PID 5964 07/02