SM5964 Datasheet, PDF (12/28 Pages) SyncMOS Technologies,Inc – 8 - bit single chip microcontroller with 64KB flash & 1K byte RAM embedded

SyncMOS Technologies Inc.
July 2002
SM5964
overlay with the ISP service program space address, the flash program/page erase of ISP function executed thereafter will
have no effect.
ISP Flash Data Register (ISPFD,$F6)
bit-7
bit-0
Read:
Write:
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
Reset value:
0
0
0
0
0
0
0
0
FD7 ~ FD0: flash data for ISP function
The ISPFD provide the 8-bit data for ISP function.
ISP Flash Control Register (ISPC, $F7)
bit-7
bit-0
Read:
Write:
START Unused Unused Unused Unused Unused
F1
F0
Reset value:
0
*
*
*
*
*
0
0
F[1: 0] : ISP function select bit
START : ISP function start bit
= 1 : start ISP function which indicated by bit 1, bit 0 (F1, F0)
= 0 : no operation
The START bit is read-only by default, software must write three specific values 55H, AAH and 55H sequentially to the
ISPFD register to enable the START bit write attribute. That is :
MOV ISPFD, #55H
MOV ISPFD, #AAH
MOV ISPFD, #55H
Any attempt to set START bit will not be allowed without the procedure above.
After START bit set to 1 then the SM5964 hardware circuit will latch address and data bus and hold the program counter until
the START bit reset to 0 when ISP function finished. User does not need to check START bit status by software method.
F[1:0]
00
01
10
11
ISP function
Byte program
Chip protect
Page erase
Chip erase
F[1:0] : ISP function select bit
Specifications subject to change without notice,contact your sales representatives for the most recent information.
12/28
Ver 1.0
PID 5964 07/02