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M34A02 Datasheet, PDF (9/15 Pages) STMicroelectronics – 2 Kbit Serial SMBus EEPROM for ACR Card Configuration
M34A02
Table 5. DC Characteristics
(TA = –40 to 85 °C; VCC = 2.7 to 3.6 V)
Symbol
Parameter
Test Condition
ILI
Input Leakage Current
(SCL, SDA, E2, E1, E0)
0 V ≤ VIN ≤ VCC
ILO Output Leakage Current
0 V ≤ VOUT ≤ VCC, SDA in Hi-Z
ICC Supply Current
VCC=3.6V, fc=100kHz (rise/fall time < 30ns)
VCC =2.7V, fc=100kHz (rise/fall time < 30ns)
ICC1 Supply Current (Stand-by)
VIN = VSS or VCC
VIL
Input Low Voltage
(E0-E2, SCL, SDA)
VIH
Input High Voltage
(E0-E2, SCL, SDA)
VIL Input Low Voltage (WC)
VIH Input High Voltage (WC)
VOL Output Low Voltage
IOL = 3 mA
Min.
– 0.3
2.1
– 0.3
2.1
Max. Unit
± 2 µA
± 2 µA
2
mA
1
mA
1
µA
0.8
V
VCC+1 V
0.5
V
VCC+1 V
0.4
V
Table 6. AC Characteristics
M34A02
Symbol
Alt.
Parameter
VCC=2.7 to 3.6V
TA = –40 to 85°C
Unit
Min
Max
tCH1CH2
tR
Clock Rise Time
1000
ns
tCL1CL2
tF
Clock Fall Time
300
ns
tDH1DH2 2
tR
SDA Rise Time
1000
ns
tDL1DL2 2
tF
SDA Fall Time
300
ns
tCHCL
tHIGH Clock Pulse Width High
4
µs
tCLCH
tLOW Clock Pulse Width Low
4.7
µs
tCHDX 1
tSU:STA START Set-up Time
4.7
µs
tDLCL
tHD:STA START Hold Time
4
µs
tDXCX
tSU:DAT SDA In Set-up Time
250
ns
tCLDX
tHD:DAT SDA In Hold Time
0
µs
tCHDH
tSU:STO STOP Set-up Time
4
µs
tDHDL
tBUF Time the bus must be free between STOP and next START
4.7
µs
tCLQV 3
tAA
Clock Low to SDA Out Valid
400
900
ns
tCLQX
tDH SDA Out Hold Time after Clock Low
300
ns
fC
fSCL Clock Frequency
10
100
kHz
tW
tWR
Write Time
10
ms
Note: 1. For a reStart condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
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