M34A02 Datasheet, PDF (5/15 Pages) STMicroelectronics – 2 Kbit Serial SMBus EEPROM for ACR Card Configuration

M34A02
Table 4. Operating Modes
Mode
RW bit
Current Address Read
1
0
Random Address Read
1
Sequential Read
1
Byte Write
0
Page Write
0
Note: 1. X = V_IH or V_IL.
WC ¹
X
X
X
X
V_IL
V_IL
same as the pattern applied on Chip Enable (E0,
E1, E2).
The 8^th bit is the Read/Write bit (RW). This bit is
set to 1 for Read and 0 for Write operations. If a
match occurs on the Device Select code, the
corresponding device gives an acknowledgment
Bytes
1
1
≥1
1
≤ 16
Initial Sequence
START, Device Select, RW = 1
START, Device Select, RW = 0, Address
reSTART, Device Select, RW = 1
Similar to Current or Random Address Read
START, Device Select, RW = 0
START, Device Select, RW = 0
on Serial Data (SDA) during the 9^th bit time. If the
device does not match the Device Select code, it
deselects itself from the bus, and goes into Stand-
by mode.
Figure 6. Write Mode Sequences with WC=1 (data write inhibited)
WC
Byte Write
ACK
ACK
NO ACK
DEV SEL
BYTE ADDR
DATA IN
R/W
WC
Page Write
WC (cont'd)
Page Write
(cont'd)
ACK
ACK
NO ACK
NO ACK
DEV SEL
BYTE ADDR DATA IN 1
DATA IN 2
DATA IN 3
R/W
NO ACK
NO ACK
DATA IN N
AI02803C
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