M34A02 Datasheet, PDF (11/15 Pages) STMicroelectronics – 2 Kbit Serial SMBus EEPROM for ACR Card Configuration

Table 8. Ordering Information Scheme
Example:
M34A02
– V DW 6
T
M34A02
Memory Capacity
02 2 Kbit (256 x 8)
Operating Voltage
V
2.7 V to 3.6 V
Package
MN SO8 (150 mil width)
DW TSSOP8 (169 mil width)
Option
T Tape and Reel Packing
Temperature Range
6 –40 °C to 85 °C
output, and sends additional clock pulses so that
the device continues to output the next byte in
sequence. To terminate the stream of bytes, the
bus master must not acknowledge the last byte,
and must generate a Stop condition, as shown in
Figure 8.
The output data comes from consecutive
addresses, with the internal address counter
automatically incremented after each byte output.
After the last memory address, the address
counter ‘rolls-over’, and the device continues to
output data from memory address 00h.
Acknowledge in Read Mode
For all Read commands, the device waits, after
each byte read, for an acknowledgment during the
9^th bit time. If the bus master does not drive Serial
Data (SDA) Low during this time, the device
terminates the data transfer and switches to its
Stand-by mode.
The notation used for the device number is as
shown in Table 8. For a list of available options
(speed, package, etc.) or for further information on
any aspect of this device, please contact your
nearest ST Sales Office.
ORDERING INFORMATION
Devices are shipped from the factory with the
memory content set at all 1s (FFh).
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