M34A02 Datasheet, PDF (7/15 Pages) STMicroelectronics – 2 Kbit Serial SMBus EEPROM for ACR Card Configuration

Figure 8. Write Cycle Polling Flowchart using ACK
WRITE Cycle
in Progress
START Condition
DEVICE SELECT
with RW = 0
First byte of instruction
with RW = 0 already
decoded by the device
NO ACK
Returned
YES
Next
NO
Operation is
Addressing the
Memory
ReSTART
YES
Send Address
and Receive ACK
STOP
NO
START
YES
Condition
M34A02
DATA for the
WRITE Operation
DEVICE SELECT
with RW = 1
Continue the
WRITE Operation
Continue the
Random READ Operation
AI01847C
as ‘roll-over’ occurs. Data starts to become
overwritten (in a way not formally specified in this
data sheet).
The bus master sends from one up to 16 bytes of
data, each of which is acknowledged by the
memory if Write Control (WC) is Low. If Write
Control (WC) is High, the contents of the
addressed memory location are not modified, and
each data byte is followed by a NoAck. After each
byte is transferred, the internal byte address
counter (the 4 least significant bits only) is
incremented. The transfer is terminated by the bus
master generating a Stop condition.
Minimizing System Delays by Polling On ACK
During the internal Write cycle, the device
disconnects itself from the bus, and copies the
data from its internal latches to the memory cells.
The maximum Write time (t_w) is shown in Table 6,
but the typical time is shorter. To make use of this,
an Ack polling sequence can be used by the bus
master.
The sequence, as shown in Figure 7, is:
– Initial condition: a Write cycle is in progress.
– Step 1: the bus master issues a Start condition
followed by a Device Select code (the first byte
of the new instruction).
– Step 2: if the device is busy with the internal
Write cycle, no Ack will be returned and the bus
master goes back to Step 1. If the device has
terminated the internal Write cycle, it responds
with an Ack, indicating that the memory is ready
to receive the second part of the next instruction
(the first byte of this instruction having been sent
during Step 1).
Read Operations
Read operations are performed independently of
the state of the Write Control (WC) signal.
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