M34A02 Datasheet, PDF (8/15 Pages) STMicroelectronics – 2 Kbit Serial SMBus EEPROM for ACR Card Configuration

M34A02
Figure 9. Read Mode Sequences
CURRENT
ADDRESS
READ
ACK
NO ACK
DEV SEL
DATA OUT
R/W
RANDOM
ADDRESS
READ
ACK
ACK
ACK
NO ACK
DEV SEL *
BYTE ADDR
DEV SEL *
DATA OUT
R/W
R/W
SEQUENTIAL
CURRENT
READ
SEQUENTIAL
RANDOM
READ
ACK
ACK
DEV SEL
DATA OUT 1
R/W
ACK
NO ACK
DATA OUT N
ACK
ACK
ACK
ACK
DEV SEL *
BYTE ADDR
DEV SEL *
DATA OUT 1
R/W
R/W
ACK
NO ACK
DATA OUT N
AI01942
Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1^st and 3^rd bytes) must be identical.
Random Address Read
A dummy Write is performed to load the address
into the address counter (as shown in Figure 8) but
without sending a Stop condition. Then, the bus
master sends another Start condition, and repeats
the Device Select Code, with the RW bit set to 1.
The device acknowledges this, and outputs the
contents of the addressed byte. The bus master
must not acknowledge the byte, and terminates
the transfer with a Stop condition.
Current Address Read
The device has an internal address counter which
is incremented each time a byte is read. For the
Current Address Read operation, following a Start
condition, the bus master only sends a Device
Select Code with the RW bit set to 1. The device
acknowledges this, and outputs the byte
addressed by the internal address counter. The
counter is then incremented. The bus master
terminates the transfer with a Stop condition, as
shown in Figure 8, without acknowledging the
byte.
Sequential Read
This operation can be used after a Current
Address Read or a Random Address Read. The
bus master does acknowledge the data byte
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