RM0376 Datasheet, PDF (86/968 Pages) STMicroelectronics – This reference manual targets application developers

Flash program memory and data EEPROM (FLASH)
RM0376
Parallel write half-page Flash program memory
• Purpose
Write 2 half-pages (one per bank) in parallel in Flash program memory.
• Size
Write only by word.
• Address
For each half-page, one address, aligned to half-page start address, must be selected
in Flash program memory. The following 15 addresses must point to the half-page
selected by first address.
Furthermore, the addresses of the second half-page must be on a different bank with
respect to the start address of the first half-page (only the first address is checked).
• Protocol
Multiple programming operation.
• Requests
PELOCK = 0, PRGLOCK = 0, FPRG = 1, PRG = 1, PARALLELBANK=1.
• Errors
This operation can generate the same kind of errors as program half-page in flash
program memory. However, PGAERR is also generated when the second half-page
selected is located in the same bank as the first half-page.
All the errors detected during this operation abort the whole program operation (i.e.
both banks).
• Description
This operation programs in parallel one half-page on both Flash program memory
banks. This speeds up the initial programming of the whole NVM.
It is possible to start with Bank 1 or Bank 2.
• Duration
Tprog (3.2 ms).
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