RM0376 Datasheet, PDF (702/968 Pages) STMicroelectronics – This reference manual targets application developers

Inter-integrated circuit (I2C) interface
RM0376
27.7.9
Bit 9 ARLOCF: Arbitration Lost flag clear
Writing 1 to this bit clears the ARLO flag in the I2C_ISR register.
Bit 8 BERRCF: Bus error flag clear
Writing 1 to this bit clears the BERRF flag in the I2C_ISR register.
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 STOPCF: Stop detection flag clear
Writing 1 to this bit clears the STOPF flag in the I2C_ISR register.
Bit 4 NACKCF: Not Acknowledge flag clear
Writing 1 to this bit clears the ACKF flag in I2C_ISR register.
Bit 3 ADDRCF: Address Matched flag clear
Writing 1 to this bit clears the ADDR flag in the I2C_ISR register. Writing 1 to this bit also clears
the START bit in the I2C_CR2 register.
Bits 2:0 Reserved, must be kept at reset value.
PEC register (I2C_PECR)
Address offset: 0x20
Reset value: 0x0000 0000
Access: No wait states
31
Res.
30
Res.
29
Res.
28
Res.
27
Res.
26
Res.
25
Res.
24
Res.
23
Res.
22
Res.
21
Res.
20
Res.
19
Res.
18
Res.
17
Res.
16
Res.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Res. Res. Res. Res. Res. Res. Res. Res.
PEC[7:0]
r
Note:
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PEC[7:0] Packet error checking register
This field contains the internal PEC when PECEN=1.
The PEC is cleared by hardware when PE=0.
If the SMBus feature is not supported, this register is reserved and forced by hardware to
“0x00000000”. Please refer to Section 27.3: I2C implementation.
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