RM0376 Datasheet, PDF (639/968 Pages) STMicroelectronics – This reference manual targets application developers

RM0376
Inter-integrated circuit (I2C) interface
27.4.1
I2C1/3 block diagram
The block diagram of the I2C1 interface is shown in Figure 189.
Figure 189. I2C1/3 block diagram
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The I2C1/3 is clocked by an independent clock source which allows to the I2C to operate
independently from the PCLK frequency.
This independent clock source can be selected for either of the following three clock
sources:
• PCLK1: APB1 clock (default value)
• HSI16: internal 16 MHz RC oscillator
• SYSCLK: system clock
Refer to Section 7: Reset and clock control (RCC) for more details.
I2C1/3 I/Os support 20 mA output current drive for Fast-mode Plus operation. This is
enabled by setting the driving capability control bits for SCL and SDA in Section 10.2.2:
SYSCFG peripheral mode configuration register (SYSCFG_CFGR2)
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