STCD2400 Datasheet, PDF (7/39 Pages) STMicroelectronics – Multichannel clock distribution circuit

STCD22x0, STCD23x0, STCD24x0
Figure 2. Block diagram
V_CC
Device overview
BYP
VTCXO
STCD24x0
V_CC
Bandgap
LDO
MC _REQ
OPT1
OPT2
MCLK
VTCXO
4
VTCXO
3
VTCXO
2
VTCXO
1
EN4
CLK4
EN3
CLK3
EN2
CLK2
EN1
CLK1
Note:
GND
ai14021
Enable signals (EN1-4) can be factory programmed either active high or active low for
STCD23x0 and can have different polarity options by configuring OPT1 and OPT2 for
STCD22x0 and STCD24x0. Master clock request (MC_REQ) is open drain output and active
low.
Figure 3. Hardware hookup (master clock enable active low)
V_CC
Enable
C
control
C
C
XO ^{VDD EN}
VIO
V_CC
BYP
VTCXO
EN4
CLK4
STCD24x0
EN3
CLK3
MC_REQ
MCLK
EN2
CLK2
OPT1
OPT2
EN1
CLK1
Clock #4 output
Clock #3 output
Clock #2 output
Clock #1 output
ai14028a
Doc ID 15400 Rev 2
7/39