STCD2400 Datasheet, PDF (10/39 Pages) STMicroelectronics – Multichannel clock distribution circuit

Device overview
STCD22x0, STCD23x0, STCD24x0
Table 2. Pin functions (STCD22x0, 2-channel)
Pin
Pin
number name
Description
A1
V_CC Supply voltage (decouple with a 1 µF capacitor to GND)
B1 VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND)
C1 MCLK Master clock input
D1
OPT2
Optional pin 2. Connect to V_CC or GND on PC board to field configure EN2
active high/low. Refer to Section 3.2: Enable polarity for detailed information.
A2
BYP
Bypass capacitor input pin (10 nF capacitor should be connected to GND in
order to improve thermal noise performance)
B2
GND Supply ground
C2 MC_REQ Master clock request signal (open drain, active low)
D2
OPT1
Optional pin 1. Connect to V_CC or GND on PC board to field configure EN1
active high/low. Refer to Section 3.2: Enable polarity for detailed information.
A3 CLK1 Clock output channel - output 1
B3
EN1 Clock output channel enable-1 (active high/low OPT1 field programmable)
C3
EN2 Clock output channel enable-2 (active high/low OPT2 field programmable)
D3 CLK2 Clock output channel - output 2
Table 3. Pin functions (STCD23x0, 3-channel)
Pin
Pin
number name
Description
A1
V_CC Supply voltage (decouple with a 1 µF capacitor to GND)
B1 VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND)
C1 MCLK Master clock input
D1
EN3 Clock output channel enable-3 (active high/low factory laser programmable)
A2
BYP
Bypass capacitor input pin (10 nF capacitor should be connected to GND in
order to improve thermal noise performance)
B2
GND Supply ground
C2 MC_REQ Master clock request signal (open drain, active low)
D2
CLK3 Clock output channel - output 3
A3
CLK1 Clock output channel - output 1
B3
EN1 Clock output channel enable-1 (active high/low factory laser programmable)
C3
EN2 Clock output channel enable-2 (active high/low factory laser programmable)
D3
CLK2 Clock output channel - output 2
10/39
Doc ID 15400 Rev 2