STCD2400 Datasheet, PDF (16/39 Pages) STMicroelectronics – Multichannel clock distribution circuit

Application information
STCD22x0, STCD23x0, STCD24x0
4.6
Jitter
In the time domain, energy spreading can result in jitter, which is the same phenomenon as
phase noise in the frequency domain. As a sine wave passes its zero-crossing or a square
wave changes state, the real clock signal transition is not exactly the same as the ideal
case, thus causing variation in the waveform transition point. This deviation of the transition
point is known as jitter as illustrated in Figure 8.
Figure 8. Jitter
1
2
PI1
Ideal transfer point
3
4
PI 2
PI 3
5
PI 4
PR1
PR2
PR3
PR4
t
6
7
8
9
10
Real square wave transfer point
ai14029
In Figure 8 the square wave ideal transition point should happen at points 1, 2, 3, 4 and 5,
and each "ideal" period PI1 to PI4 should be the same, thus no time jitter has occurred.
Actually, the real transition point happens at points 6, 7, 8, 9 and 10, thus causing "real"
periods PR1 to PR4 to not be the same, and exhibit visible jitter. If each of the real periods of
the cycles (PR1 to PR4) is measured, period jitter is obtained. The cycle-to-cycle jitter is
also obtained by calculating the difference between two adjacent periods (for example, PR2-
PR1, PR3-PR2 …).
These periods of jitter are described as peak-to-peak jitter and are calculated by subtracting
the minimum value from the maximum value or may also be described by the root-mean-
square (RMS) value, representing one standard deviation of the Gaussian distribution.
4.7
Output trace line
The STCD22x0, STCD23x0 and STCD24x0 is designed with maximum 50 Ω impedance
output. On the PC board, a 50 Ω transmission line with proper series termination should be
used to avoid signal distortion and reflection.
16/39
Doc ID 15400 Rev 2