STD16N50M2 Datasheet, PDF (4/21 Pages) STMicroelectronics – Extremely low gate charge

Electrical characteristics
STD16N50M2, STF16N50M2, STP16N50M2
2
Electrical characteristics
(TC = 25 °C unless otherwise specified).
Table 5: On /off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source breakdown
voltage
VGS = 0 V, ID = 1 mA
IDSS
Zero gate voltage drain
current
VGS = 0 V, VDS = 500 V
VGS = 0 V, VDS = 500 V,
TC = 125 °C ⁽¹⁾
IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V
VGS(th)
RDS(on)
Gate threshold voltage
Static drain-source
on-resistance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 6.5 A
Min. Typ. Max. Unit
500
V
1 µA
100 µA
±10 µA
2
3
4
V
0.24 0.28 Ω
Notes:
(1)_{Defined by design, not subject to production test.}
Symbol
Parameter
Ciss Input capacitance
Coss Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.⁽¹⁾
Equivalent output
capacitance
RG Intrinsic gate resistance
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
Table 6: Dynamic
Test conditions
VDS= 100 V, f = 1 MHz,
VGS = 0 V
Min. Typ. Max. Unit
- 710 - pF
-
44
-
pF
- 1.35 - pF
VDS = 0 V to 400 V, VGS = 0 V
- 192 - pF
f = 1 MHz, ID= 0 A
- 5.2 -
Ω
VDD = 400 V, ID = 13 A,
- 19.5 - nC
VGS = 0 to 10 V
(see Figure 19: "Test circuit for
-
4
- nC
gate charge behavior")
-
8
- nC
Notes:
(1) _{Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS}
increases from 0 to 80% VDSS.
Symbol
Parameter
td(on) Turn-on delay time
tr
Rise time
td(off) Turn-off-delay time
tf
Fall time
Table 7: Switching times
Test conditions
VDD = 250 V, ID = 6.5 A
RG = 4.7 Ω, VGS = 10 V
(see Figure 18: "Test circuit for
resistive load switching times"
and Figure 23: "Switching time
waveform")
Min. Typ. Max. Unit
- 9.6
-
ns
- 7.6
-
ns
-
32
-
ns
-
10
-
ns
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