STB6N62K3 Datasheet, PDF (4/19 Pages) STMicroelectronics – Very low intrinsic capacitance

Electrical characteristics
2
Electrical characteristics
(T_C = 25 °C unless otherwise specified)
Table 4. On /off states
Symbol
Parameter
Test conditions
V_(BR)DSS
Drain-source
breakdown voltage
I_D = 1 mA, V_GS = 0
I_DSS
I_GSS
V_GS(th)
R_DS(on
Zero gate voltage
V_DS = 620 V
drain current (V_GS = 0) V_DS = 620 V, T_C=125 °C
Gate-body leakage
current (V_DS = 0)
V_GS = ± 20 V
Gate threshold voltage V_DS = V_GS, I_D = 50 µA
Static drain-source on
resistance
V_GS = 10 V, I_D = 2.8 A
STB6N62K3, STD6N62K3
Min. Typ. Max. Unit
620
V
0.8 µA
50 µA
± 9 µA
3 3.75 4.5 V
0.95 1.2 Ω
Table 5.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_DS = 50 V, f = 1 MHz, V_GS = 0 -
875
100
17
pF
- pF
pF
Equivalent output
C_oss(er)(1) capacitance energy
related
Equivalent output
C_oss(tr)(2) capacitance time
related
V_GS = 0, V_DS = 0 to 480 V
-
28
- pF
-
63
- pF
R_G
Intrinsic gate
resistance
f = 1 MHz open drain
-
3.5
-
Ω
Q_g Total gate charge
V_DD = 496 V, I_D = 5.5 A,
Q_gs Gate-source charge V_GS = 10 V
Q_gd Gate-drain charge
(see Figure 18)
34
nC
-
4
- nC
22
nC
1. Is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DSS
2. Is defined as a constant equivalent capacitance giving the same storage energy as C_oss when V_DS
increases from 0 to 80% V_DSS
4/19
Doc ID 022605 Rev 1