STR720 Datasheet, PDF (381/401 Pages) STMicroelectronics – ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES

STR720 - ELECTRICAL CHARACTERISTICS
28.7.2 CLK pad characteristics (External Clock Source)
These pads are used to provide clock signal to STR720 system from an external clock source.
Since their electrical characteristics are different from normal I/O pads they are hereafter
reported in a specific table.
Table 94. DC CLK pad characteristics
Symbol
Parameter
Test Conditions⁽¹⁾
V_DD3P
V_REF
V_{REF_R}
V_IHP
(CLK)
V_ILP
(CLK)
Supply Voltage for CLK input
buffer.
Reference Voltage for CLK
input signal ⁽²⁾
Recommended reference Volt-
age for CLK input signal
Main CLK Clock (CLK) Input
high level ⁽²⁾
Main CLK Clock (CLK) Input
low level ⁽²⁾
V_REF = (V_DD3P - 1) * 0.9
±± 60 mV
See Figure 75
See Figure 75
Value
Unit
Min
Typ
Max
3.14
3.30
3.47
V
1.87
2.1
2.28
V
1.6
-
2.0
V
V_REF + 0.2
-
-
V
-
-
V_REF - 0.2 V
Table 95. AC CLK pad characteristics
Symbol
Parameter
Conditions
t_w(HP)
t_w(LP)
t_r(P)
t_f(P)
I_L
I_{DD3P_R}
I_{DD3P_S}
Main CLK Clock (CLK) high or
low time ⁽²⁾
Main CLK Clock (CLK) rise or
fall time ⁽²⁾
CLK Input leakage current
V_DD3P RUN/IDLE mode cur-
rent
V_DD3P SLOW/STOP mode
current
See Figure 75
See Figure 75
V_SS ≤ V_IN ≤ V_DD3P
Min
14.29
-
-
-
-
Value
Typ
-
-
-
2.75
-
Unit
Max
-
ns
7
ns
±1
µA
-
mA
10
nA
1. V_DD(all) = 1.80 V ± 10%, V_DD3(all) = 3.30 V ± 10%, T_A = -40 / +85 °C unless otherwise specified.
2. Data based on design guidelines and validation, not tested in production.
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