TDA7500A Datasheet, PDF (21/40 Pages) STMicroelectronics – DIGITAL AM/FM SIGNAL PROCESSOR

SPI INTERFACES
10 WORDS MAIN MICRO SPI
Symbol
Description
MASTER
t_sclk
Clock Cycle
t_dtr
Sclk edge to MOSI valid
t_misosetup MISO setup time
t_misohold MISO hold time
t_sclkh
SCK high time
t_sclkl
SCK high low
SLAVE
t_sclk
Clock Cycle
t_dtr
Sclk edge to MOSI valid
t_mosisetup MOSI setup time
t_mosihold MOSI hold time
t_sclkh
SCK high time
t_sclkl
SCK high low
DISPLAY SPI (different timings)
MASTER
t_sclk
Clock Cycle
SLAVE
t_sclk
Clock Cycle
Figure 6. SPI Clocking scheme.
SSM, SSD (#9, #13)
SCLKD, SCLKM (#6, #10)
(CPOL=0, CPHA=0)
SCLKD, SCLKM (#6, #10)
(CPOL=0, CPHA=1)
SCLKD, SCLKM (#6, #10)
(CPOL=1, CPHA=0)
SCLKD, SCLKM (#6, #10)
(CPOL=1, CPHA=1)
MISOM, MOSIM (#7, #8)
MISOD, MOSID (#11, #12)
MSB
6
5
4
3
TDA7500A
Min Value
12T_DSP
40
16
4
0.5t_sclk
0.5t_sclk
12T_DSP
40
16
4
0.5t_sclk
0.5t_sclk
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6T_DSP
ns
6T_DSP
ns
2
1
LSB
Internal Strobe for Data Capture
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