ST10F280 Datasheet, PDF (133/186 Pages) STMicroelectronics – 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM

Figure 68 : Internal (simplified) Reset Circuitry.
EINIT Instruction
Clr
Q
Set
Reset State
Machine
Clock
Internal
Reset
Signal
Trigger
SRST instruction
watchdog overflow
Clr
Reset Sequence
BDRSTEN
(512 CPU Clock Cycles)
Asynchronous
Reset
From/to Exit
Powerdown
Circuit
ST10F280
RSTOUT
V_CC
RSTIN
V_CC
RPD
Weak pull-down
(~200µA)
Figure 69 : Minimum External Reset Circuitry
RSTOUT
RSTIN
ST10F280
+
C1
External
Hardware
a) Manual Hardware Reset
b) For Automatic Power-up Reset and interruptible power-down mode
V_DD
RPD
R0
+
C0
133/186