ST10F280 Datasheet, PDF (1/186 Pages) STMicroelectronics – 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM

ST10F280
16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM
s HIGH PERFORMANCE CPU WITH DSP FUNCTIONS
- 16-BIT CPU WITH 4-STAGE PIPELINE.
- 50ns INSTRUCTION CYCLE TIME AT 40MHz CPU
CLOCK.
- MULTIPLY/ACCUMULATE UNIT (MAC) 16 X 16-BIT
MULTIPLICATION, 40-BIT ACCUMULATOR
- REPEAT UNIT.
- ENHANCED BOOLEAN BIT MANIPULATION FACILITIES.
- ADDITIONAL INSTRUCTIONS TO SUPPORT HLL
AND OPERATING SYSTEMS.
- SINGLE-CYCLE CONTEXT SWITCHING SUPPORT.
s MEMORY ORGANIZATION
- 512K BYTE ON-CHIP FLASH MEMORY SINGLE
VOLTAGE WITH ERASE/PROGRAM CONTROLLER.
- 100K ERASING/PROGRAMMING CYCLES.
- 20 YEAR DATA RETENTION TIME
- UP TO 16M BYTE LINEAR ADDRESS SPACE FOR
CODE AND DATA (5M BYTE WITH CAN).
- 2K BYTE ON-CHIP INTERNAL RAM (IRAM).
- 16K BYTE EXTENSION RAM (XRAM).
s FAST AND FLEXIBLE BUS
- PROGRAMMABLE EXTERNAL BUS CHARACTERIS-
TICS FOR DIFFERENT ADDRESS RANGES.
- 8-BIT OR 16-BIT EXTERNAL DATA BUS.
- MULTIPLEXED OR DEMULTIPLEXED EXTERNAL
ADDRESS/DATA BUSES.
- FIVE PROGRAMMABLE CHIP-SELECT SIGNALS.
- HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT.
s INTERRUPT
- 8-CHANNEL PERIPHERAL EVENT CONTROLLER
FOR SINGLE CYCLE, INTERRUPT DRIVEN DATA
TRANSFER.
- 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56
SOURCES, SAMPLE-RATE DOWN TO 25ns.
s TWO MULTI-FUNCTIONAL GENERAL PURPOSE
TIMER UNITS WITH 5 TIMERS.
s TWO 16-CHANNEL CAPTURE/COMPARE UNITS
s A/D CONVERTER
- 2X16-CHANNEL 10-BIT.
- 4.85µS CONVERSION TIME
- ONE TIMER FOR ADC CHANNEL INJECTION
s 8-CHANNEL PWM UNIT
s SERIAL CHANNELS
- SYNCHRONOUS/ASYNC SERIAL CHANNEL
- HIGH-SPEED SYNCHRONOUS CHANNEL.
s FAIL-SAFE PROTECTION
- PROGRAMMABLE WATCHDOG TIMER.
- OSCILLATOR WATCHDOG.
PRODUCT PREVIEW
PBGA208 (23 x 23 x 1.96 - Pitch 1.27 mm)
(Plastic Bold Grid Array)
ORDER CODE: ST10F280-JT3
s TWO CAN 2.0b INTERFACES OPERATING ON ONE
OR TWO CAN BUSSES (30 OR 2X15 MESSAGE
OBJECTS)
s ON-CHIP BOOTSTRAP LOADER
s CLOCK GENERATION
- ON-CHIP PLL.
- DIRECT OR PRESCALED CLOCK INPUT.
s UP TO 143 GENERAL PURPOSE I/O LINES
- INDIVIDUALLY PROGRAMMABLE AS INPUT, OUT-
PUT OR SPECIAL FUNCTION.
- PROGRAMMABLE THRESHOLD (HYSTERESIS).
s IDLE AND POWER DOWN MODES
s MAXIMUM CPU FREQUENCY 40MHz
s PACKAGE PBGA 208 BALLS (23mm x 23mm x
1.96 mm - PITCH 1.27mm).
s SINGLE VOLTAGE SUPPLY: 5V ±10% (EMBEDDED
REGULATOR FOR 3.3 V CORE SUPPLY).
s TEMPERATURE RANGE: -40 +125^°C
32
512K Byte
Flash Memory
CPU-Core and MAC Unit
16K Byte
XRAM
P4.5 CAN1_RxD
P4.6 CAN1_TxD
P4.4 CAN2_RxD
P4.7 CAN2_TxD
CAN1
CAN2
16
16
PEC
Interrupt Controller
16
16
2K Byte
Internal
RAM
Watchdog
Oscillator
and PLL
XTAL1 XTAL2
16
3.3V Voltage
Regulator
16
16
8
Port 6
8
Port 5
16
BRG
BRG
Port 3
15
16
Port 7
Port 8
8
8
P7.7 Trigger for ADC
channel injection
XPORT10 XPORT9 XPWM XTIMER
16
16
4
XADCINJ
External connexion
March 2003
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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