TDA7503 Datasheet, PDF (13/26 Pages) STMicroelectronics – DUAL DSP PLUS MICRO FOR AUDIO APPLICATIONS

TDA7503
SPI INTERFACE
Symbol
t_sclk
Clock Cycle
t_dtr
Sclk edge to MOSI valid
t_dts
MISO setup time
t_sclk
t_dtr
t_dts
t_sckph
t_sckpl
Clock Cycle
Sclk edge to MOSI valid
MISO setup time
Minimum SCK high time
Minimum SCK low time
Description
MASTER
SLAVE
Figure 8. SPI Clocking scheme.
SS
SCLK _{(CPOL=0, CPHA=0)}
SCLK (CPOL=0, CPHA=1)
SCLK ^{(CPOL=1, CPHA=0)}
SCLK ^{(CPOL=1, CPHA=1)}
MISO/
MOSI
MSB
6
5
4
3
Min
Value
Unit
mclk/12
µs
40
µs
5
µs
mclk/6
µs
40
µs
5
µs
mclk/12
µs
mclk/12
µs
2
1
LSB
Internal Strobe for Data Capture
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