English
Language : 

M36L0R7060U1 Datasheet, PDF (13/22 Pages) STMicroelectronics – 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
M36L0R7060U1, M36L0R7060L1, M36L0R7050U1, M36L0R7050L1
Signal descriptions
2.19
VDDQF Supply Voltage
VDDQF provides the power supply to the I/O pins and enables all Outputs to be powered
independently of VDDF. VDDQF can be tied to VDDF or can use a separate supply.
2.20
VPPF Flash memory Program Supply Voltage
VPPF is both a control input and a power supply pin. The two functions are selected by the
voltage range applied to the pin.
If VPPF is kept in a low voltage range (0V to VDDQF) VPPF is seen as a control input. In this
case a voltage lower than VPPLK gives absolute protection against program or erase, while
VPPF in the VPP1 range enables these functions (see the M58LRxxxGUL datasheet for the
relevant values). VPPF is only sampled at the beginning of a program or erase; a change in
its value after the operation has started does not have any effect and program or erase
operations continue.
If VPPF is in the range of VPPH it acts as a power supply pin. In this condition VPPF must be
stable until the Program/Erase algorithm is completed.
2.21
VSS Ground
VSS ground is the common Flash memory and PSRAM ground. It is the reference for the
core supplies. It must be connected to the system ground.
2.22
Note:
VSSQ Ground
VSSQ ground is the reference for the input/output circuitry driven by VDDQF. VSSQ must be
connected to VSS
Each device in a system should have VDDF, VDDQF and VPP decoupled with a 0.1µF ceramic
capacitor close to the pin (high frequency, inherently low inductance capacitors should be as
close as possible to the package). See Figure 5: AC measurement load circuit. The PCB
track widths should be sufficient to carry the required VPP program and erase currents.
13/22