ST10F296E Datasheet, PDF (115/346 Pages) STMicroelectronics – High performance 16-bit CPU with DSP functions

ST10F296E
Pulse-width modulation (PWM) modules
Table 58. PWM unit frequencies and resolution at 64 MHz CPU clock
Mode 0
Resolution
8-bit
10-bit
12-bit
14-bit
CPU clock/1
CPU clock/64
15.6 ns
1.0 µs
250 kHz
3.91 kHz
62.5 kHz
976.6 Hz
15.63 kHz
244.1 Hz
3.91 Hz
61.01 Hz
Mode 1
Resolution
8-bit
10-bit
12-bit
14-bit
CPU clock/1
CPU clock/64
15.6 ns
1.0 µs
125 kHz
1.95 kHz
31.25 kHz
488.28 Hz
7.81 kHz
122.07 Hz
1.95 kHz
30.52 Hz
16-bit
977 Hz
15.26 Hz
16-bit
488.3 Hz
7.63 Hz
12.1
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XPWM output signals
The output signals of the four XPWM channels (XPOUT3...XPOUT0) are available as
dedicated pins. The XPWM signals are XORed with the outputs of the XPOLAR register
before being driven to the dedicated pins. This allows the XPWM signal (XPOLAR.x = 0) or
the inverted XPWM signal (XPOLAR.x = 1) to be driven directly.
Using open-drain mode allows two or more XPWM outputs to be combined through an
AND-wired configuration, using an external pull-up device. This provides a type of burst
mode for any XPWM channel.
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XPWM registers
XPOLAR register
The XPWMPORT register controls the specific XPWM output pins. Each output can be
enabled/disabled which allows the XPWM to be configured as a push-pull or open-drain
driver. In addition, the signal coming from the XPOLAR register is inverted. If both
XPOLAR.Y and XP.y are set, no inversion is achieved.
XPOLAR (EC04h)
XBus
Reset value: 0000h
15 14 13 12 11 10 9 8 7 6 5 4 3
2
1
0
Reserved
XPO XPO XPO XPO
LAR.3 LAR.2 LAR.1 LAR.0
-
RW RW RW RW
Table 59.
Bit
15-4
XPOLAR register description
Bit name
-
Reserved
XPWM channel Y polarity bit
Function
3-0
XPOLAR.Y 0: Polarity of channel Y is normal
1: Polarity of channel Y is inverted
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