S6E2H1 Datasheet, PDF (120/159 Pages) SPANSION – processor version

S6E2H1 Series
High-speed Synchronous Serial (SPI = 0, SCINV = 1)
Parameter
Symbol Pin Name Conditions
VCC < 4.5 V
Min
Max
(VCC = 2.7V to 5.5V, VSS = 0V)
VCC ≥ 4.5 V
Min
Max
Unit
Serial clock cycle time
tSCYC
SCKx
4tCYCP
-
4tCYCP
-
ns
SCK↑→SOT delay time
SIN→SCK↓
setup time
SCK↓→SIN hold time
tSHOVI
SCKx,
SOTx
Internal shift
-10
+10
tIVSLI
SCKx,
SINx
clock operation
14
12.5*
-
tSLIXI
SCKx,
SINx
5
-
-10
12.5
5
+10 ns
-
ns
-
ns
Serial clock L pulse width
tSLSH
SCKx
2tCYCP – 5
-
2tCYCP – 5
-
ns
Serial clock H pulse width
tSHSL
SCKx
tCYCP + 10
-
tCYCP + 10
-
ns
SCK↑→SOT delay time
tSHOVE
SCKx,
SOTx
External shift
-
15
-
15
ns
SIN→SCK↓
setup time
tIVSLE
SCKx,
SINx
clock operation
5
-
5
-
ns
SCK↓→SIN hold time
tSLIXE
SCKx,
SINx
5
-
5
-
ns
SCK falling time
SCK rising time
tF
SCKx
tR
SCKx
-
5
-
5
ns
-
5
-
5
ns
Notes:
− The above characteristics apply to CLK synchronous mode.
− tCYCP indicates the APB bus clock cycle time.
About the APB bus number which multi-function serial is connected to, see 8. Block Diagram in this data sheet.
− These characteristics only guarantee the following pins.
− No chip select: SIN4_1, SOT4_1, SCK4_1
− Chip select: SIN6_1, SOT6_1, SCK6_1, SCS6_1
− When the external load capacitance CL = 30 pF. (For *, when CL = 10 pF)
Document Number: 001-98940 Rev.*A
Page 120 of 159