USB97C102 Datasheet, PDF (63/80 Pages) SMSC Corporation – Multi-Endpoint USB Peripheral Controller with Integrated 5 Port HUB

OUT_NAKLO
(0x7FEE – RESET=0x00)
BIT
NAME
R/W
2
OUT_NAK_2
R/W
1
OUT_NAK_1
R/W
0
OUT_NAK_0
R/W
OUT_NAKLO REGISTER
DESCRIPTION
This bit is set(1) when the SIE responds with a NAK to OUT
tokens on EP 2 and reset(0) when after the MCU writes a ‘1’ to
it.
This bit is set(1) when the SIE responds with a NAK to OUT
tokens on EP 1 and reset(0) when after the MCU writes a ‘1’ to
it.
This bit is set(1) when the SIE responds with a NAK to OUT
tokens on EP 0 and reset(0) when after the MCU writes a ‘1’ to
it.
Table 116 – OUT_NAKHI Register
OUT_NAKHI
(0x7FEF – RESET=0x00)
OUT_NAKHI REGISTER
BIT
NAME
R/W
DESCRIPTION
7
OUT_NAK_15
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 15 and reset(0) when after the MCU writes a
‘1’ to it.
6
OUT_NAK_14
R/W This bit is set(1) after t when the SIE responds with a NAK to
OUT tokens on EP 14 and reset(0) when after the MCU writes a
‘1’ to it.
5
OUT_NAK_13
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 13 and reset(0) when after the MCU writes a
‘1’ to it.
4
OUT_NAK_12
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 12 and reset(0) when after the MCU writes a
‘1’ to it.
3
OUT_NAK_11
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 11 and reset(0) when after the MCU writes a
‘1’ to it.
2
OUT_NAK_10
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 10 and reset(0) when after the MCU writes a
‘1’ to it.
1
OUT_NAK_9
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 9 and reset(0) when after the MCU writes a
‘1’ to it.
0
OUT_NAK_8
R/W This bit is set(1) when after the SIE responds with a NAK to
OUT tokens on EP 8 and reset(0) when after the MCU writes a
‘1’ to it.
SMSC DS – USB97C102
Page 63
Rev. 03/23/2000