USB97C102 Datasheet, PDF (31/80 Pages) SMSC Corporation – Multi-Endpoint USB Peripheral Controller with Integrated 5 Port HUB

Table 38 - ISA Bus Status Mask Register
BUS_MASK
(0x7F74 - RESET=0xFF)
ISA BUS STATUS MASK REGISTER
BIT
NAME
R/W
DESCRIPTION
7 CH3RQ_MASK
R/W
Channel 3 DMA Request ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
6 CH2RQ_MASK
R/W
Channel 2 DMA Request ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
5 CH1RQ_MASK
R/W
Channel 1 DMA Request ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
4 CH0RQ_MASK
R/W
Channel 0 DMA Request ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
3 CH3TC_MASK
R/W
Channel 3 Terminal Count ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
2 CH2TC_MASK
R/W
Channel 2 Terminal Count ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
1 CH1TC_MASK
R/W
Channel 1 Terminal Count ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
0 CH0TC_MASK
R/W
Channel 0 Terminal Count ISADMA Interrupt Mask
0 = Enable Interrupt
1 = Mask Interrupt
Table 39 - ISA I/O Window Base Register
IOBASE
(0x7F71 - RESET=0x00)
ISA I/O WINDOW BASE REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:0]
SA[15:8]
R/W
When the 8051 reads or writes to the ISA I/O Window,
this register is combined with the 8 bit offset in the 256
byte window and presented as the 64k I/O Space address
during an 8051-ISA IOR or IOW cycle
Table 40 - ISA Memory Window Base Register
MEMBASE
(0x7F72 - RESET=0x00)
ISA MEMORY WINDOW BASE REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:0]
SA[19:12]
R/W
When the 8051 reads or writes to the ISA Memory
Window, this register is combined with the 12 bit
offset in the 4k byte window and presented as the
1Mbyte Memory address during an 8051-ISA
MEMR or MEMW cycle.
8237 (ISADMA) REGISTER DESCRIPTION
Memory Map
Table 41 - ISADMA Memory Map
8237 MEMORY ADDRESS
DESCRIPTION
0xFC00-0xFFFF
1k Window to Packet with PNR=0x1F
0xF800-0xFBFF
1k Window to Packet with PNR=0x1E
0xF400-0xF7FF
1k Window to Packet with PNR=0x1D
0xF000-0xF3FF
1k Window to Packet with PNR=0x1C
0xEC00-0xEFFF
1k Window to Packet with PNR=0x1B
0xE800-0xEBFF
1k Window to Packet with PNR=0x1A
0xE400-0xE7FF
1k Window to Packet with PNR=0x19
0xE000-0xE3FF
1k Window to Packet with PNR=0x18
0xDC00-0xDFFF
1k Window to Packet with PNR=0x17
SMSC DS – USB97C102
Page 31
Rev. 03/23/2000