LAN9116_08 Datasheet, PDF (53/132 Pages) SMSC Corporation – Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
3.13.1 RX Slave PIO Operation
Using PIO mode, the host can either implement a polling or interrupt scheme to empty the received
packet out of the RX data FIFO. The host will remain in the idle state until it receives an indication
(interrupt or polling) that data is available in the RX data FIFO. The host will then read the RX status
FIFO to get the packet status, which will contain the packet length and any other status information.
The host should perform the proper number of reads, as indicated by the packet length plus the start
offset and the amount of optional padding added to the end of the frame, from the RX data FIFO.
SMSC LAN9116
init
Last Packet
Idle
RX Interrupt
Read RX
Status
DWORD
Read RX
Packet
Not Last Packet
Figure 3.16 Host Receive Routine Using Interrupts
init
Last Packet
Read
RX_FIFO_
INf
Valid Status DWORD
Read RX
Status
DWORD
Read RX
Packet
Not Last Packet
Figure 3.17 Host Receive Routine with Polling
53
DATASHEET
Revision 1.5 (07-11-08)