LAN8187_06 Datasheet, PDF (19/72 Pages) SMSC Corporation – ±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWRTM

±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR^TM
Datasheet
The encoding process may be bypassed by clearing bit 6 of register 31. When the encoding is
bypassed the 5^th transmit data bit is equivalent to TX_ER.
Note that encoding can be bypassed only when the MAC interface is configured to operate in MII
mode.
Table 4.1 4B/5B Code Table
CODE
GROUP
11110
01001
10100
10101
01010
01011
01110
01111
10010
10011
10110
10111
11010
11011
11100
11101
11111
11000
10001
01101
00111
00100
00110
11001
00000
00001
SYM
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
I
J
K
T
R
H
V
V
V
V
RECEIVER
INTERPRETATION
TRANSMITTER
INTERPRETATION
0
0000
DATA
1
0001
2
0010
3
0011
4
0100
5
0101
6
0110
7
0111
8
1000
9
1001
A
1010
B
1011
C
1100
D
1101
E
1110
F
1111
IDLE
First nibble of SSD, translated to “0101”
following IDLE, else RX_ER
Second nibble of SSD, translated to
“0101” following J, else RX_ER
First nibble of ESD, causes de-assertion
of CRS if followed by /R/, else assertion
of RX_ER
Second nibble of ESD, causes
deassertion of CRS if following /T/, else
assertion of RX_ER
Transmit Error Symbol
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
0
0000
1
0001
2
0010
3
0011
4
0100
5
0101
6
0110
7
0111
8
1000
9
1001
A
1010
B
1011
C
1100
D
1101
E
1110
F
1111
Sent after /T/R until TX_EN
Sent for rising TX_EN
Sent for rising TX_EN
Sent for falling TX_EN
Sent for falling TX_EN
Sent for rising TX_ER
INVALID
INVALID
INVALID
INVALID
DATA
Revision 1.0 (12-14-06)
19
DATASHEET
SMSC LAN8187/LAN8187I