LAN9211_12 Datasheet, PDF (17/147 Pages) SMSC Corporation – High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
NAME
Crystal 1, Clock In
Crystal 2
Reset
Table 2.4 System and Power Signals
SYMBOL
XTAL1/CLKIN
XTAL2
nRESET
BUFFER
TYPE
lCLK
OCLK
IS
(PU)
NUM
PINS
1
1
1
DESCRIPTION
External 25MHz Crystal Input. This pin can also
be connected to single-ended TTL oscillator
(CLKIN). If this method is implemented, XTAL2
should be left unconnected.
External 25MHz Crystal output.
Active-low reset input. Resets all logic and
registers within the LAN9211. This signal is
pulled high with a weak internal pull-up resistor.
Note:
The LAN9211 must be reset on power-
up via nRESET or following power-up
via a soft reset (SRST). The LAN9211
must always be read at least once
after reset, or upon return from a
power-saving state or write operations
will not function. See Section 3.11,
"Detailed Reset Description," on
page 46 for additional information
Wakeup Indicator
PME
O8/OD8
Auto-MDIX Enable
AMDIX_EN
No Connect
NC
I
(PU)
1
When programmed to do so, is asserted when
the LAN9211 detects a wake event and is
requesting the system to wake up from the
associated sleep state. The polarity and buffer
type of this signal is programmable.
Note:
Detection of a Power Management
Event, and assertion of the PME
signal will not wakeup the LAN9211.
The LAN9211will only wake up when it
detects a host write cycle (assertion of
nCS and nWR). Although any write to
the LAN9211, regardless of the data
written, will wake-up the device when
it is in a power-saving mode, it is
required that the BYTE_TEST register
be used for this purpose.
1
Enables Auto-MDIX. Pull high or leave
unconnected to enable Auto-MDIX, pull low to
disable Auto-MDIX.
1
No Connect. This pin must be left open.
SMSC LAN9211
17
DATASHEET
Revision 2.9 (03-01-12)