LAN9211_12 Datasheet, PDF (122/147 Pages) SMSC Corporation – High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support

5.5.9 Special Modes
Index (In Decimal):
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
18
Size:
16-bits
ADDRESS
15-8
Reserved
DESCRIPTION
7:5
MODE: PHY Mode of operation. Refer to Table 5.9 for more details.
4:0
PHYAD: PHY Address:
The PHY Address is used for the SMI address.
TYPE DEFAULT
RW,
NASR
RW,
NASR
RW,
NASR
111
00001b
MODE
000
001
010
011
100
101
110
111
Table 5.9 MODE Control
DEFAULT REGISTER BIT VALUES
MODE DEFINITIONS
REGISTER 0
REGISTER 4
10Base-T Half Duplex. Auto-negotiation disabled.
10Base-T Full Duplex. Auto-negotiation disabled.
100Base-TX Half Duplex. Auto-negotiation disabled.
CRS is active during Transmit & Receive.
100Base-TX Full Duplex. Auto-negotiation disabled.
CRS is active during Receive.
100ase-TX Half Duplex is advertised. Auto-
negotiation enabled.
CRS is active during Transmit & Receive.
Repeater mode. Auto-negotiation enabled.
100Base-TX Half Duplex is advertised.
CRS is active during Receive.
Reserved - Do not set the LAN9211 in this mode.
All capable. Auto-negotiation enabled.
[13,12,10,8]
0000
0001
1000
1001
1100
1100
N/A
X10X
Note 5.4
[8,7,6,5]
N/A
N/A
N/A
N/A
0100
0100
N/A
1111
Note 5.4 When MODE=111, the register 0 bits 13 and 8 are variable dependant on the auto-
negotiated speed and duplex.
Revision 2.9 (03-01-12)
122
DATASHEET
SMSC LAN9211