SI52143 Datasheet, PDF (9/21 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, & GEN 3 QUAD OUTPUT CLOCK GENERATOR WITH 25 MHZ REFERENCE CLOCK

3. Test and Measurement Setup
Figure 3 shows the test load configuration for HCSL clock outputs.
OUT+
OUT-
L1 = 5"
L1
50
L1
50
Si52143
M easurem ent
P oint
2 pF
M easurem ent
P oint
2 pF
Figure 3. 0.7 V Differential Load Configuration
Please reference application note AN781 recommendations on how to terminate the differential outputs for LVDS,
LVPECL, or CML signalling levels.
Figure 4. Differential Output Measurement for Differential Signals
(for AC Parameters Measurement)
Rev 1.3
9