SI52143 Datasheet, PDF (6/21 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, & GEN 3 QUAD OUTPUT CLOCK GENERATOR WITH 25 MHZ REFERENCE CLOCK

Si52143
Table 2. AC Electrical Specification (Continued)
Parameter
Spread Range
Symbol
SPR-2
Test Condition
Min
Down spread
—
Modulation Frequency
F_MOD
30
REF(25 MHz) at 3.3 V
Duty Cycle
Rising and Falling Edge Rate
Cycle to Cycle Jitter
Long Term Accuracy
Enable/Disable and Set-Up
T_DC
T_R / T_F
T_CCJ
L_ACC
Measurement at 1.5 V
45
Measured between 0.8 and 2.0 V 1.0
Measurement at 1.5 V
—
Measured at 1.5 V
—
Clock Stabilization from
T_STABLE
—
Power-up
Stopclock Set-up Time
T_SS
10.0
Notes:
1. Visit www.pcisig.com for complete PCIe specifications.
2. Gen 4 specifications based on the PCI-Express Base Specification 4.0 rev. 0.5.
3. Download the Silicon Labs PCIe Clock Jitter Tool at www.silabs.com/pcie-learningcenter.
Typ
–0.5
31.5
—
—
—
—
—
—
Max Unit
—
%
33 kHz
55
%
4.0 V/ns
300 ps
100 ppm
1.8 ms
—
ns
Table 3. Absolute Maximum Conditions
Parameter
Main Supply Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Flammability Rating
Symbol
V_{DD_3.3V}
V_IN
T_S
T_A
T_J
Ø_JC
Ø_JA
ESD_HBM
UL-94
Test Condition
Functional
Min Typ
—
—
Relative to V_SS
Non-functional
–0.5 —
–65 —
Functional
–40 —
Functional
—
—
JEDEC (JESD 51)
—
—
JEDEC (JESD 51)
—
—
JEDEC (JESD 22-A114) 2000 —
UL (Class)
V–0
Max Unit
4.6 V
4.6 V_DC
150 °C
85 °C
150 °C
35 °C/W
37 °C/W
—V
Note: While using multiple power supplies, the voltage on any input or I/O pin cannot exceed the power pin during power-up. Power
supply sequencing is not required.
6
Rev 1.3