SI52143 Datasheet, PDF (16/21 Pages) Silicon Laboratories – PCI-EXPRESS GEN 1, GEN 2, & GEN 3 QUAD OUTPUT CLOCK GENERATOR WITH 25 MHZ REFERENCE CLOCK

Si52143
5. Pin Descriptions: 24-Pin QFN
VDD_REF 1
REF 2
SSON² ₃
VSS_REF 4
OE_REF¹ 5
VDD_DIFF 6
24 23 22 21 20 19
18 OE[3:2]¹
17 ^VDD_DIFF
25
GND
16 _DIFF3
15 DIFF3
14 DIFF2
13 DIFF2
7 8 9 10 11 12
Pin #
1
2
3
4
5
6
7
8
9
10
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
Table 7. Si52143 24-Pin QFN Descriptions
Name
VDD_REF
REF
SSON
VSS_REF
OE_REF
VDD_DIFF
OE[1:0]
DIFF0
DIFF0
DIFF1
Type
Description
PWR 3.3 V power supply.
O, SE 3.3 V, 25 MHz crystal reference clock output.
I,PD Active high input pin enables –0.5% spread on DIFF outputs
(internal 100 k pull-down).
GND Ground
I,PU Active high input to enable or disable REF clock.
PWR 3.3 V power supply.
I,PU Active high input to enable or disable DIFF0 and DIFF1 clocks.
O, DIF 0.7 V, 100 MHz differential clock output.
O, DIF 0.7 V, 100 MHz differential clock output.
O, DIF 0.7 V, 100 MHz differential clock output.
16
Rev 1.3