SI5013 Datasheet, PDF (8/26 Pages) List of Unclassifed Manufacturers – OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER

Si5013
Table 3. AC Characteristics (Clock and Data)
(V_DD = 3.3 V ±5%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min Typ Max Unit
Output Clock Rate
f_CLK
Rate Sel = 1
Rate Sel = 0
Output Rise Time—OC-12
t_R
Output Fall Time—OC-12
t_F
Output Clock Duty Cycle—
OC-12/3
Figure 3
Figure 3
Clock to Data Delay
OC-12
OC-3
t_Cr-D
Figure 2
Clock to Data Delay
OC-12
OC-3
t_Cf-D
Figure 2
Input Return Loss
100 kHz–622 MHz
Slicing Level Offset
(relative to the internally set
input common mode voltage)
Loss-of-Signal Range^*
(peak-to-peak differential)
V_SLICE SLICE_LVL = 750 mV to 2.25 V
V_LOS
LOS_LVL = 1.50 to 2.50 V
Loss-of-Signal Response Time t_LOS
Figure 5 on page 6
*Note: Adjustment voltage is calculated as follows: V_LOS = (LOS_LVL – 1.50)/25.
616
—
675 MHz
154
—
158
—
125
155
ps
—
125
155
ps
47
50
53 % of
UI
800 860
940
ps
4000 4100 4200
0
35
70
ps
800 850 1000
–15
—
—
dB
See Figure 8 on page 14.
0
—
40
mV
8
20
25
µs
8
Rev. 1.5